1. Field of the Invention
The present invention relates to a semiconductor integrated circuit, more particularly to a technology for controlling a substrate voltage applied to an MOS (Metal Oxide Semiconductor) transistor in which a source and a substrate are separated from each other.
2. Description of the Related Art
In a CMOS transistor, there is a possibility that a latchup phenomenon is generated when a noise is applied in the state in which a substrate bias voltage is applied in a forward direction (forward bias). To describe the latchup phenomenon, a parasitic bipolar transistor (thyristor structure) remains a conducted state, in which a large current flow is constantly generated between a power-supply terminal and a ground terminal. The generation of the latchup phenomenon results in LSI breakdown and operation failure.
As a conventional method for preventing the generation of the latchup phenomenon, as shown in FIG. 9, a diode element is provided so as to control an upper limit of a substrate voltage. In the shown structure, an diode current generated in the diode element is converted into a voltage, and the voltage is compared to a predetermined threshold value so that the generated substrate bias voltage is controlled to stay below the predetermined threshold value. Such a constitution is recited in, for example, No. 2001-156261 of the Publication of the Unexamined Japanese Patent Applications (4-6, Page 19, 9, FIG. 77).
However, the current generated in the diode is variable depending on a shape thereof. Therefore, the diode does not necessarily provide a structure suitable for accurately measuring the voltage generated in a physical structure constituting a semiconductor integrated circuit. Further, because the latchup phenomenon is generated as a result of the current amplified by the thyristor structure of the bipolar transistor, the latchup phenomenon is generated in different situations depending on values of a PMOS substrate voltage and an NMOS substrate voltage. In other words, there are different situations in the case in which the forward bias is generated in the NMOS substrate alone and in the case in which the forward bias is generated in both of the NMOS and PMOS substrates. Accordingly, it was difficult to precisely control the latchup phenomenon in the conventional technology using the diode.